How to become a senior digital IC Design Engineer (4-1) script: building a file comparison environment based on python, shell script, Verilog and C language (Digital IC Verification)

introduction

         This is based on  Python、Shell Script 、Verilog、C Language 、UVM Method to build an environment for automatic comparison of file data , Can achieve Verilog Output and output of the module C Automatic data comparison of model output , To achieve an efficient 、 Automated 、 Automatically positioned numbers IC Verification effect ！

         At present, it has been applied to the simple UT Module verification in progress , No need to pass UVM The environment and SV Language , It can realize the automatic comparison of a large amount of data , This is the digital IC The gospel of designers and script designers ！